1. Field
Apparatuses and methods consistent with exemplary embodiments relate to a semiconductor device, and more particularly to, a receiver circuit to receive a signal and a signal receiving method thereof.
2. Description of the Related Art
In recent mobile technology trends, researches have been conducted to achieve a semiconductor integrated circuit having a higher integration, higher performance, and lower power consumption. Among various methods of reducing power consumption of the semiconductor integrated circuit, a method of lowering a driving voltage of the semiconductor integrated circuit is widely used. In this method, a voltage of less than about 1.0 V may be used as a power supply voltage of a logic circuit that is included in a system on chip (SoC). A signal magnitude that is set to be higher than about 1.0 V is signaled to satisfy various standards and interfaces in interchip communications. This means that a data and/or signal receiving circuit needs to provide a large margin with respect to various levels of input signals for the transmission and reception of various data between chips.
A complementary metal oxide semiconductor (CMOS) process for fabricating elements that are tolerant of a high-voltage signal is needed for a chip to receive various levels of signals. However, the CMOS process is expensive. Thus, there is a need for an input circuit which converts a voltage level of a high-voltage signal into a logical level and a voltage level of a low-voltage signal into the same logical level.